MARC details
| 000 -LEADER |
|---|
| fixed length control field |
01802nam a2200349Ia 4500 |
| 001 - CONTROL NUMBER |
|---|
| control field |
174940 |
| 003 - CONTROL NUMBER IDENTIFIER |
|---|
| control field |
0000000000 |
| 005 - DATE AND TIME OF LATEST TRANSACTION |
|---|
| control field |
20211104025130.0 |
| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION |
|---|
| fixed length control field |
110216s2009 000 0 eng d |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER |
|---|
| International Standard Book Number |
9781608453108 (v.1);9781608453115 (v.2) |
| 040 ## - CATALOGING SOURCE |
|---|
| Original cataloging agency |
AEA |
| Transcribing agency |
AEA |
| Description conventions |
rda |
| 050 ## - LIBRARY OF CONGRESS CALL NUMBER |
|---|
| Classification number |
TK 7868.D5 |
| Item number |
.Sy78 2009 |
| 245 #0 - TITLE STATEMENT |
|---|
| Title |
Synthesis series in digital circuits and systems |
| 264 ## - PRODUCTION, PUBLICATION, DISTRIBUTION, MANUFACTURE, AND COPYRIGHT NOTICE |
|---|
| Place of production, publication, distribution, manufacture |
San Rafael, CA : |
| Name of producer, publisher, distributor, manufacturer |
Morgan & Claypool Publishers, |
| Date of production, publication, distribution, manufacture, or copyright notice |
2009.;©2009. |
| 300 ## - PHYSICAL DESCRIPTION |
|---|
| Extent |
1 v. [various paging] : |
| Other physical details |
illustrations |
| Dimensions |
27 cm. |
| 336 ## - CONTENT TYPE |
|---|
| Content type term |
text |
| Source |
rdacontent |
| 338 ## - CARRIER TYPE |
|---|
| Carrier type term |
volume |
| Source |
rdacarrier |
| 505 ## - FORMATTED CONTENTS NOTE |
|---|
| Formatted contents note |
Microcontrollers fundamentals for engineers and scientist / Steven F. Barrett, Daniel J. Pack -- High0speed digital system design / Justin Davis -- Introduction to logic synthesis using verilog HDL / Robert B. Reese, Michell A. Thornton -- Finite state machine datapath design, optimization and implementation / Justin Davis, Robert B. Reese. |
| 520 ## - SUMMARY, ETC. |
|---|
| Summary, etc. |
High-Speed Digital System Design |
| 520 ## - SUMMARY, ETC. |
|---|
| Summary, etc. |
Introduction to Logic Synthesis using Verilog HDL |
| 520 ## - SUMMARY, ETC. |
|---|
| Summary, etc. |
Microcontrollers Fundamentals for Engineers and Scientists |
| 520 ## - SUMMARY, ETC. |
|---|
| Summary, etc. |
This is the first volume in a new hardcover combined volume of Synthesis Lectures. This volume contains the following lectures: Finite State Machine Datapath Design, Optimization, and Implementation |
| 650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM |
|---|
| Topical term or geographic name as entry element |
Digital electronics. |
| Source of heading or term |
sears |
| 9 (RLIN) |
19755 |
| 700 ## - ADDED ENTRY--PERSONAL NAME |
|---|
| Personal name |
Barrett, Steven F. |
| 9 (RLIN) |
106899 |
| 700 ## - ADDED ENTRY--PERSONAL NAME |
|---|
| Personal name |
Davis, Justin. |
| 9 (RLIN) |
106900 |
| 700 ## - ADDED ENTRY--PERSONAL NAME |
|---|
| Personal name |
Pack, Daniel J. |
| 9 (RLIN) |
106901 |
| 700 ## - ADDED ENTRY--PERSONAL NAME |
|---|
| Personal name |
Reese, Robert B. |
| 9 (RLIN) |
106902 |
| 700 ## - ADDED ENTRY--PERSONAL NAME |
|---|
| Personal name |
Thornton, Michell A. |
| 9 (RLIN) |
106903 |
| 942 ## - ADDED ENTRY ELEMENTS (KOHA) |
|---|
| Koha item type |
Reference |
